We seek one (1) Experienced Hardware R&D Engineer for our team. The candidate should have proven multi-year experience on hardware RTL design, integration and validation with a background in European Research Projects. The candidates will participate in the R&D activities of FORTH in the context of the EuroHPC JU project EPI-SGA2. The European Processor Initiative develops a roadmap for future European high-performance low power processors aligned with the EuroHPC roadmap. EPI focuses on processor technologies based on ARM ISA and architecture for covering the short-term needs and HPC accelerator technologies based on RISC-V, the open-source ISA. RISC-V is also candidate to become the Europa’s own technologies for covering long term objectives. SGA2 also seeks to expand the scope of the project into adjacent European and global vertical markets that can leverage HPC to enable new and improved systems and solutions. The EPI SGA2 proposal, built on top of EPI SGA1 represents the second step toward the implementation of this roadmap. SGA2 has a three-year duration with the following objectives: a) Finalize the development and the bring-up of the first generation of low-power processor units developed in SGA1, b) Develop the second generation of the General Purpose Processor (GPP) applying technological enhancements targeting the European Exascale machines with respect to the GPP (Rhea) of SGA1, c) Develop the second generation of low power accelerator test chips, usable by the HPC community for tests and finally d) Develop sound and realistic industrialisation & commercialisation paths and enable the long-term economical sustainability with an industrialization path in the edge computing area, demonstrated in a few well-chosen proof of concepts like autonomous shuttles or video surveillance.